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  AON6912A 30v dual asymmetric n-channel mosfet general description product summary q1 q2 30v 30v i d (at v gs =10v) 34a 52a r ds(on) (at v gs =10v) <13.7m w <7.3m w r ds(on) (at v gs = 4.5v) <19.3m w <10.4m w 100% uis tested 100% rg tested symbol absolute maximum ratings t a =25c unless otherwise noted parameter units the AON6912A is designed to provide a high efficien cy synchronous buck power stage with optimal layout an d board space utilization. it includes two specializ ed mosfets in a dual power dfn5x6 package. the q1 "high side" mosfet is designed to minimize switchin g losses. the q2 "low side" mosfet is designed for l ow r ds(on) to reduce conduction losses. the AON6912A is well suited for use in compact dc/dc converter applications. v ds max q1 max q2 top view pin1 dfn5x6 top view bottom view bottom view symbol v ds v gs i dm i as , i ar e as , e ar t j , t stg parameter symbol typ q1 typ q2 max q1 max q2 t 10s 29 24 35 29 steady-state 56 50 67 60 steady-state r q jc 4.5 3.5 5.5 4.2 maximum junction-to-case c/w c/w maximum junction-to-ambient a d r q ja maximum junction-to-ambient a c/w 13.8 34 t c =25c t c =100c avalanche energy l=0.1mh c 130 12 10 power dissipation b p d t a =70c t a =25c pulsed drain current c t a =25c i dsm t a =70c power dissipation a p dsm mj avalanche current c continuous drain current a 8 10.8 parameter gate-source voltage drain-source voltage 30 i d t c =25c t c =100c continuous drain current 30 9 w units units 28 24 80 a w vv -55 to 150 a 22 85 thermal characteristics 1.9 2.1 1.2 1.3 22 52 21 junction and storage temperature range c max q1 max q2 20 33 top view pin1 dfn5x6 top view bottom view bottom view rev1: mar. 2011 www.aosmd.com page 1 of 10
AON6912A symbol min typ max units bv dss 30 v v ds =30v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.5 1.9 2.5 v i d(on) 85 a 9.8 13.7 t j =125c 14.5 21.5 12.9 19.3 m w g fs 45 s v sd 0.75 1 v i s 25 a c iss 610 760 910 pf c oss 88 125 160 pf c rss 40 70 100 pf r g 0.8 1.6 2.4 w q g (10v) 11 14 17.0 nc q g (4.5v) 5 6.6 8.0 nc q gs 2.4 nc q gd 3 nc t d(on) 4.4 ns t 9 ns i dss v gs =10v, i d =10a reverse transfer capacitance v gs =0v, v ds =15v, f=1mhz switching parameters forward transconductance i s =1a,v gs =0v r ds(on) q1 electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions static drain-source on-resistance m w m a zero gate voltage drain current drain-source breakdown voltage on state drain current i d =250 m a, v gs =0v v gs =10v, v ds =5v v ds =v gs i d =250 m a v ds =0v, v gs = 20v gate-body leakage current v ds =5v, i d =10a v gs =4.5v, i d =10a diode forward voltage gate resistance v gs =0v, v ds =0v, f=1mhz v =10v, v =15v, r =1.5 w , total gate charge maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time total gate charge v gs =10v, v ds =15v, i d =10a gate source charge gate drain charge t r 9 ns t d(off) 17 ns t f 6 ns t rr 5.6 7 8.4 ns q rr 6.4 8 9.6 nc components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery time i f =10a, di/dt=500a/ m s v gs =10v, v ds =15v, r l =1.5 w , r gen =3 w body diode reverse recovery charge i f =10a, di/dt=500a/ m s turn-on rise time turn-off delaytime turn-off fall time a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initial t j =25 c. d. the r q ja is the sum of the thermal impedence from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. the maximum current rating is limited by package . h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. rev1: mar. 2011 www.aosmd.com page 2 of 10
AON6912A q1-channel: typical electrical and thermal characteristics 17 52 10 0 18 0 5 10 15 20 25 30 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 6 8 10 12 14 16 18 0 5 10 15 20 25 30 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =10a v gs =10v i d =10a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 10 20 30 40 50 60 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =3v 4.5v 10v 4v 3.5v 6v 40 0 5 10 15 20 25 30 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 6 8 10 12 14 16 18 0 5 10 15 20 25 30 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =10a v gs =10v i d =10a 5 10 15 20 25 30 2 4 6 8 10 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) 25 c 125 c v ds =5v v gs =4.5v v gs =10v i d =10a 25 c 125 c 0 10 20 30 40 50 60 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =3v 4.5v 10v 4v 3.5v 6v 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c rev1: mar. 2011 www.aosmd.com page 3 of 10
AON6912A q1-channel: typical electrical and thermal characteristics 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased safe operating area (note f) 1ms 100us dc r ds(on) limited t j(max) =150 c t c =25 c 10 m s 0 2 4 6 8 10 0 2 4 6 8 10 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 1000 1200 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to- case (note f) c oss c rss v ds =15v i d =10a t j(max) =150 c t c =25 c 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased safe operating area (note f) 1ms 100us dc r ds(on) limited t j(max) =150 c t c =25 c 10 m s 0 2 4 6 8 10 0 2 4 6 8 10 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 1000 1200 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to- case (note f) 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 z q qq q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) c oss c rss v ds =15v i d =10a single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =150 c t c =25 c r q jc =5.5 c/w rev1: mar. 2011 www.aosmd.com page 4 of 10
AON6912A q1-channel: typical electrical and thermal characteristics 17 52 10 0 18 10 100 0.000001 0.00001 0.0001 0.001 i ar (a) peak avalanche current time in avalanche, t a (s) figure 12: single pulse avalanche capability (note c) 0 5 10 15 20 25 0 25 50 75 100 125 150 power dissipation (w) t case ( c) figure 13: power de-rating (note f) 0 5 10 15 20 25 30 35 40 0 25 50 75 100 125 150 current rating i d (a) t case ( c) figure 14: current de-rating (note f) t a =25 c 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) t a =25 c t a =150 c t a =100 c t a =125 c 40 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 10 100 0.000001 0.00001 0.0001 0.001 i ar (a) peak avalanche current time in avalanche, t a (s) figure 12: single pulse avalanche capability (note c) 0 5 10 15 20 25 0 25 50 75 100 125 150 power dissipation (w) t case ( c) figure 13: power de-rating (note f) 0 5 10 15 20 25 30 35 40 0 25 50 75 100 125 150 current rating i d (a) t case ( c) figure 14: current de-rating (note f) t a =25 c 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) t a =25 c t a =150 c t a =100 c t a =125 c r q ja =67 c/w rev1: mar. 2011 www.aosmd.com page 5 of 10
AON6912A symbol min typ max units bv dss 30 v v ds =30v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.3 1.9 2.5 v i d(on) 130 a 6.1 7.3 t j =125c 8.5 10.2 8.3 10.4 m w g fs 60 s v sd 0.7 1 v i s 35 a c iss 870 1090 1300 pf c oss 340 490 640 pf c rss 22 38 53 pf r g 0.4 0.9 1.4 w q g (10v) 12 16 20 nc q g (4.5v) 5 7 9 nc q gs 2 2.5 3 nc q gd 1.5 2.5 3.5 nc t d(on) 5 ns t 2 ns v ds =0v, v gs = 20v gate-body leakage current i dss q2 electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions static drain-source on-resistance m w m a zero gate voltage drain current v gs =10v, i d =20a r ds(on) drain-source breakdown voltage on state drain current i d =250 m a, v gs =0v v gs =10v, v ds =5v v ds =v gs i d =250 m a v ds =5v, i d =20a v gs =4.5v, i d =20a diode forward voltage v =10v, v =15v, r =0.75 w , gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge v gs =10v, v ds =15v, i d =20a gate source charge reverse transfer capacitance v gs =0v, v ds =15v, f=1mhz switching parameters forward transconductance i s =1a,v gs =0v maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time gate drain charge total gate charge t r 2 ns t d(off) 16 ns t f 2 ns t rr 10 13 16 ns q rr 20 25 30 nc components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. v gs =10v, v ds =15v, r l =0.75 w , r gen =3 w turn-off fall time i f =20a, di/dt=500a/ m s body diode reverse recovery time i f =20a, di/dt=500a/ m s turn-on rise time turn-off delaytime body diode reverse recovery charge a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature t j(max) =150 c. ratings are based on low frequency and duty cycl es to keep initial t j =25 c. d. the r q ja is the sum of the thermal impedence from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. rev1: mar. 2011 www.aosmd.com page 6 of 10
AON6912A q2-channel: typical electrical and thermal characteristics 17 52 10 0 18 0 10 20 30 40 50 1 1.5 2 2.5 3 3.5 4 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 0 3 6 9 12 15 0 5 10 15 20 25 30 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =20a v gs =10v i d =20a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 20 40 60 80 100 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =3v 3.5v 4.5v 10v 4v 40 0 10 20 30 40 50 1 1.5 2 2.5 3 3.5 4 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 0 3 6 9 12 15 0 5 10 15 20 25 30 r ds(on) (m w ww w ) i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c 0.8 1 1.2 1.4 1.6 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =4.5v i d =20a v gs =10v i d =20a 0 5 10 15 20 25 30 2 4 6 8 10 r ds(on) (m w ww w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) 25 c 125 c v ds =5v v gs =4.5v v gs =10v i d =20a 25 c 125 c 0 20 40 60 80 100 0 1 2 3 4 5 i d (a) v ds (volts) fig 1: on-region characteristics (note e) v gs =3v 3.5v 4.5v 10v 4v rev1: mar. 2011 www.aosmd.com page 7 of 10
AON6912A q2-channel: typical electrical and thermal characteristics 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased safe operating area (note f) 10 m s 1ms dc r ds(on) limited t j(max) =150 c 100 m s 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to- case (note f) 0 2 4 6 8 10 0 3 6 9 12 15 18 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 1000 1200 1400 1600 1800 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss c oss c rss v ds =15v i d =20a t j(max) =150 c t c =25 c 10ms 40 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 i d (amps) v ds (volts) figure 9: maximum forward biased safe operating area (note f) 10 m s 1ms dc r ds(on) limited t j(max) =150 c 100 m s 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 power (w) pulse width (s) figure 10: single pulse power rating junction-to- case (note f) 0 2 4 6 8 10 0 3 6 9 12 15 18 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 200 400 600 800 1000 1200 1400 1600 1800 0 5 10 15 20 25 30 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 z q qq q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) c oss c rss v ds =15v i d =20a single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =150 c t c =25 c r q jc =4.2 c/w 10ms rev1: mar. 2011 www.aosmd.com page 8 of 10
AON6912A q2-channel: typical electrical and thermal characteristics 17 52 10 0 18 10 100 0.000001 0.00001 0.0001 0.001 i ar (a) peak avalanche current time in avalanche, t a (s) figure 12: single pulse avalanche capability (note c) 0 5 10 15 20 25 30 35 0 25 50 75 100 125 150 power dissipation (w) t case ( c) figure 13: power de-rating (note f) 0 10 20 30 40 50 60 0 25 50 75 100 125 150 current rating i d (a) t case ( c) figure 14: current de-rating (note f) t a =25 c 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 15: single pulse power rating junction-to- ambient (note g) t a =25 c t a =150 c t a =100 c t a =125 c 40 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 16: normalized maximum transient thermal imp edance (note g) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 10 100 0.000001 0.00001 0.0001 0.001 i ar (a) peak avalanche current time in avalanche, t a (s) figure 12: single pulse avalanche capability (note c) 0 5 10 15 20 25 30 35 0 25 50 75 100 125 150 power dissipation (w) t case ( c) figure 13: power de-rating (note f) 0 10 20 30 40 50 60 0 25 50 75 100 125 150 current rating i d (a) t case ( c) figure 14: current de-rating (note f) t a =25 c 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 15: single pulse power rating junction-to- ambient (note g) t a =25 c t a =150 c t a =100 c t a =125 c r q ja =60 c/w rev1: mar. 2011 www.aosmd.com page 9 of 10
AON6912A - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off id + l vgs vds bv unclamped inductive switching (uis) test circuit & waveforms vds dss 2 e = 1/2 li ar ar - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr rev1: mar. 2011 www.aosmd.com page 10 of 10


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